10

Transient analysis of submicron CMOS latchup with a physical criterion

Year:
1994
Language:
english
File:
PDF, 1.13 MB
english, 1994
29

Substrate-triggered ESD clamp devices for use in power-rail ESD clamp circuits

Year:
2002
Language:
english
File:
PDF, 890 KB
english, 2002
38

Year:
2006
Language:
english
File:
PDF, 1.09 MB
english, 2006
43

Area-efficient layout design for CMOS output transistors

Year:
1997
Language:
english
File:
PDF, 600 KB
english, 1997
47

Latchup-free fully-protected ESD protection circuit for input pad of submicron CMOS ICs

Year:
1997
Language:
english
File:
PDF, 693 KB
english, 1997